Some studies require the generator to the grid frequency, the ratio between which would be expressed using natural numbers (positive integers greater than zero). In other words, the frequency in the grid must obey the rule **F=f/n**where: **f** is the basic or reference frequency, **n** is a natural number, and **F** is the frequency output by the generator.

This problem can be solved by using the microcontroller, but it will need a firmware program and knowledge of programming. MK. In addition, this limits the number of outputs and increases the cost of the entire device. The proposed solution goes quite fast, does not require knowledge in programming MK, and penny at cost. In addition, the scheme can be extended to any number of outputs.

When you use series circuits К561 generator can operate with a maximum reference frequency (output X1.1) up to 0.5 MHz, and with a series of К1561 — up to 1 .. 1.5 MHz.

A master oscillator assembled according to the standard scheme — in two logic elements DD1.1 and DD1.2, which can as the master circuit to use as an RC-circuit (R1R2C2) and quartz crystal (ZQ1). The signal from the generator passes the buffer D1.3, the output of which is fed to the counters-dividers frequency — DD2-DD4. The first pair of counters DD2.1-DD2.2 divides the frequency of the oscillator to the numbers from the number **2 ^{n}**, where

**n**is a natural number. I.e., the frequency of the oscillator is divided 2, 4, 8, 16, 32, and 64% (outputs X1.1-X1.6, respectively).

The second and Tatia pair of counters DD3.1-DD3.2 and DD4.1 and DD4.2 divides the frequency already on the numbers from the number **2 ^{n}*(2+m)**, where

**m**is an odd positive integers that are selected by the combination switch SA2 (SA3). So for example when contact closed SA2.1

**m**is equal to 1, and sets the oscillator frequency is divided by 6, 12, 24, 48 times (outputs X2.1-X1.4, respectively).

Because we believe the reference frequency **f** output X1.1, all other outputs are recalculated relative to it. The table below shows the grid frequency of the first pair of counters:

X1.1 | X1.2 | X1.3 | X1.4 | X1.5 | X1.6 |

f | f/2 | f/4 | f/8 | f/16 | f/32 |

The following are the grid frequencies of the second pair of counters depending on the combination of closed contacts of the switch SA2:

SA2 | X1.1 | X2.1 | X2.2 | X2.3 | X2.4 |

1 | f | f/3 | f/6 | f/12 | f/24 |

2 | f | f/5 | f/10 | f/20 | f/40 |

1, 2 | f | f/7 | f/14 | f/28 | f/56 |

3 | f | f/9 | f/18 | f/36 | f/72 |

3, 1 | f | f/11 | f/22 | f/44 | f/88 |

3, 2 | f | f/13 | f/26 | f/52 | f/104 |

3, 1, 2 | f | f/15 | f/30 | f/60 | f/120 |

This same table is valid for the third pair, but instead of SA2 SA3 needs to be substituted, and X2 replaced by X3.

The diagram does not show the power pins of chips. They are standard. For the 16 pin of section: 8 — negative supply (common), 16 — plus, for the 14 pin: 7 — negative supply (common), 14 — plus. All the cons need to connect and be connected to the common wire. All positive findings — to +V.

You can do otherwise: to take as the reference frequency of the output X2.4 mode of all closed contacts of the switch SA2. Then the output frequencies will be considered as **F=F*n**where: **f** — reference frequency output X2.4, and **n** are natural numbers or their relationships. All **n** will be greater than unity. In this case, the table grid is recalculated as:

SA2 | X2.1 | X2.2 | X2.3 | X2.4 |

1, 2, 3 | f*8 | f*4 | f*2 | f |

X1.1 | X1.2 | X1.3 | X1.4 | X1.5 | X1.6 |

f*120 | f*60 | f*30 | f*15 | f*15/2 | f*15/4 |

SA3 | X2.4 | X3.1 | X3.2 | X3.3 | X3.4 |

1 | f | f*40 | f*20 | f*10 | f*5 |

2 | f | f*24 | f*12 | f*6 | f*3 |

1, 2 | f | f*120/7 | f*60/7 | f*30/7 | f*15/7 |

3 | f | f*120/9 | f*60/9 | f*30/9 | f*15/9 |

3, 1 | f | f*120/11 | f*60/11 | f*30/11 | f*15/11 |

3, 2 | f | f*120/13 | f*60/13 | f*30/13 | f*15/13 |

3, 1, 2 | f | f*8 | f*4 | f*2 | f |

Bold in the table selected frequency formed by integers, representing the General interest.

As can be seen from the diagram, the blocks on DD3 and DD4 are exactly the same. The number of these blocks can be changed depending on needs. So for example, if you only need one independent generator, it is possible to remove part of the circuit on DD4, and all device will work on all 3 chips. If on the contrary, we need more independent generators in the scheme, you can add blocks similar to the DD3.

Because the device operates on CMOS logic, the supply voltage to 12V low power output MOSFET gate keys can be connected directly to the outputs X1-X3, which in some cases can greatly simplify the circuit arrangement.

Vyacheslav Gorchilin, 2016

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